The Link State Routing Algorithm for an Interconnection Networks in Network on Chip
Abstract - A network is a group of computer systems and other computing hardware devices that are linked together through communication channels to assist communication and resource sharing. A number of processors in bus based System on Chip (SoC) are increased continuously and they face design challenges in different aspects. This bus architecture has faced the bottleneck problem when more processors, integrated into a single chip. To avoid bottlenecks, bus architecture is replaced with the network architecture which is similar to the data networks. Network on Chip (NoC) is a communication subsystem on an integrated circuit, typically between IP cores. NoC technology applies networking theory and methods to on-chip communication and brings notable improvements over conventional bus and crossbar interconnections. The objective of this project is to find the minimal path to transmit the data packets between the source and destination using the link state routing algorithm in network on chip. In the link state routing algorithm, each router shares its routing table with every other router in the network. Link state routing in Network on Chip systems is a little bit personalized version of the traditional one (XY routing). If the minimal paths are found between the routers the performance and throughput of the network are automatically increased and the latency of packets transmission is reduced. The CBHR (cluster based hierarchical routing) algorithm is used to provide the clustering method to improve the efficiency of network in Network on Chip.
Index Terms - Network on Chip (NoC), XY routing, Link state routing, CBHR (cluster based hierarchical routing) algorithm.
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International Journal for Trends in Technology & Engineering © 2015 IJTET JOURNAL